merari42@lemmy.world to Programmer Humor@lemmy.worldEnglish · 29 days agoLogic gatelemmy.worldimagemessage-square14fedilinkarrow-up1319arrow-down15
arrow-up1314arrow-down1imageLogic gatelemmy.worldmerari42@lemmy.world to Programmer Humor@lemmy.worldEnglish · 29 days agomessage-square14fedilink
minus-squarepartial_accumen@lemmy.worldlinkfedilinkEnglisharrow-up11·edit-229 days agoThe inversions on both inputs to the NAND gates bothers me. Wouldn’t inverting both inputs as well a the output turn a NAND back into an AND gate?
minus-squareFermion@feddit.nllinkfedilinkEnglisharrow-up7·29 days agoA NAND gate with two inverted inputs is equivalent to an OR gate. The ouput is only false when both inputs are false.
minus-squarepartial_accumen@lemmy.worldlinkfedilinkEnglisharrow-up4·29 days agoYou’re right, it doesn’t seem like it should but that checks out: 11 1 01 1 01 1 00 0
minus-squarebadcommandorfilename@lemmy.worldlinkfedilinkEnglisharrow-up4·29 days agohttps://en.m.wikipedia.org/wiki/De_Morgan’s_laws
The inversions on both inputs to the NAND gates bothers me. Wouldn’t inverting both inputs as well a the output turn a NAND back into an AND gate?
A NAND gate with two inverted inputs is equivalent to an OR gate. The ouput is only false when both inputs are false.
You’re right, it doesn’t seem like it should but that checks out:
11 1
01 1
01 1
00 0
https://en.m.wikipedia.org/wiki/De_Morgan’s_laws